Prof. Makoto Nagata

Talk Title

Deployment of EMC-Compliant IC Chip Techniques in Design for Hardware Security

Abstract

IC chips are key enablers of densely networked smart society and need to be more compliant to security and safety. The talk will start from Electromagnetic Compatibility (EMC) techniques of IC chips on the safety side, toward EMC aware design, analysis and implementation. Then, the challenges will be discussed about the deployment of such EMC techniques in the design of IC chips for the higher level of hardware security.

Short Bio

Makoto Nagata received the B.S. and M.S. degrees in physics from Gakushuin University, Tokyo, in 1991 and 1993, respectively, and a Ph.D. in electronics engineering from Hiroshima University, Hiroshima, in 2001. He is currently a professor of the graduate school of science, technology and innovation, Kobe University, Kobe, Japan.

Dr. Nagata is chairing the Technology Directions subcommittee for International Solid-State Circuits Conference (ISSCC). He has also served as an associate editor for IEEE Transactions on VLSI Systems since 2015.He was a technical program chair (2010-2011), a symposium chair and an executive committee member for the Symposium on VLSI circuits, and also a chair for IEEE SSCS Kansai Chapter.